Title:
MARK SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JPS5852823
Kind Code:
A
Abstract:
PURPOSE:To enable to remove the DC component from a mark signal easily precisely and stably in a short time by a method wherein A/D conversion is perfored on the difference between the average value of the maximum value and the minimum value of the mark signal and the reference value, and the value obtained by A/D conversion is set in a D/A converter in an A/D converter. CONSTITUTION:When a switch circuit 12 is changed over the S1 side, the mark signal obtained by electron beam scanning and an output signal from the D/A converter 15 is added by an adder 13. At this time, output of the D/A converter 15 obtained through the adder 13 is the average value of the maximum value and the minimum value. Therefore the DC component in the mark signal is removed by passing through the adder 13, output thereof is sent to a wave form detecting circuit, etc., through a driving amplifier 16, and is applied for detection of the position of mark. Accordingly the DC component in the mark signal can be removed automatically.
Inventors:
KUSAKABE HIDEO
Application Number:
JP15128281A
Publication Date:
March 29, 1983
Filing Date:
September 24, 1981
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L21/027; H01J37/304; (IPC1-7): H01L21/30
Attorney, Agent or Firm:
Takehiko Suzue