PURPOSE: To manufacture an element in high mutual conductance operating in room temperature by a method wherein a semiconductor substrate with an inclined surface, a vertical super-lattice comprising two kinds of semiconductors mutually in different affinities alternately formed in vertical stripes on the substrate with the inclined surface as well as a gate electrode changing the positions of carrier running in the direction traversing the superlattice are provided.
CONSTITUTION: The title transistor is provided with a semiconductor substrate 20 with an inclined surface, a vertical super-lattice comprising semiconductor 12, 13 mutually in different electric affinities alternately formed in vertical stripes on the said substrate 20 as well as a gate electrode 19 changing the positions of carrier running in the direction traversing the super-lattice. For example, after forming a GaAs layer 21 on the GaAs substrate 20, the AlAs layers 12 and the GaAs layers 13 are crystal-deposited on the stepped substrate alternately and into vertical striped structure perpendicular to the substrate surface to form a vertical super-lattice. Furthermore, a GaAs layer 16, an additive-free AlGaAs layer 15 and an n+AlGaAs layer 14 are formed on the surface of the vertical super-lattice and then a source electrode 17, the Schottky (gate) electrode 19 and a drain electrode 18 are formed on the stepped surface by evaporation process.
TSUBAKI KOTARO
SUSA NOBUHIKO
