PURPOSE: To mount easily a chip to a package having a different lead configuration by connecting bonding pads which are connected to input/output cells or power source interconnections to the bonding pads which are not connected to the input/output cells or power source interconnections through respective interconnections.

CONSTITUTION: An inner cell region 1 where basic cells that are able to make up logical circuits are arranged and a buffer region 2 where input/output cells that are able to make up input/output cells circuits are arranged at a peripheral part of the inner cell region 1 as well as bonding pads which are arranged at an outer circumference of the buffer region 2 are formed at a chip 4 consisting of a semiconductor substrate. The bonding pads 31 which are connected to input/output cells are connected to the bonding pads 30 that are not connected to input/output cells and are adjacent to the bonding pads 31 through interconnections 6. And the bonding pads 31 which are connected to input/output cells are connected correspondingly with leads 7 of a package mounted at the chip 4 through bonding wires 5. Thus, even when the chip 4 is mounted at the package having a different lead configuration, the utilization of the bonding pads 30 allows the connection between the lead 7 and the input/output cells.