Title:
MEASUREMENT OF INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS5957175
Kind Code:
A
Abstract:
PURPOSE: To achieve a simultaneous testing of DC items about all pins by implementing the testing of DC items selecting a load resistance group provided on a performance board.
CONSTITUTION: Relays R1WR6 and the like are controlled through a relay control circuit 9 in response to a tester 3 to select load resistances VOL1, VOL2, VOH1 and VOH2 on a performance board and set a resistance value as determined by output limit voltage/applied current in the measurement of output voltage and applied voltage/limit current in the measurement of input current. This enables the simultaneous testing of DC items about all pins in a device IC1 to be measured in the similar manner as with functional items.
Inventors:
IIZUKA TSUNEO
Application Number:
JP16792482A
Publication Date:
April 02, 1984
Filing Date:
September 27, 1982
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G01R31/316; G01R31/26; (IPC1-7): G01R31/26; H01L21/66
Domestic Patent References:
| JPS57127862A | 1982-08-09 |
Attorney, Agent or Firm:
Motoaki Hisagi