Title:
MEASUREMENT OF OVERLAY MISREGISTRATION DURING MANUFACTURE OF SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JP3308081
Kind Code:
B2
Abstract:
PURPOSE: To measure overlay misregistration during semiconductor processing by forming an inspection system, including an interference microscope that is used in combination with a camera, a wafer transport stage and a data processing electronics.
CONSTITUTION: An inspection system comprises a coherence probe microscope such as an KINNIK microscope 70 that is used in combination with a camera 72, a wafer transfer stage 74, a data processing electronic device 76, and a CRT display or a host computer 78. The system utilizes both the light rays of a wide or narrow band and a large or small numerical apertures(NA), in order to develop a series of interference images taken at different Z levels with respect to an inspection surface or at different P (pulse duration) scanning positions, with respect to a difference of arms of interferometers. As a result, overlay misregistration can be measured during semiconductor processing.
Inventors:
Isaac Mazol
Noam Nor
Yoram Yuziel
Noam Nor
Yoram Yuziel
Application Number:
JP33312893A
Publication Date:
July 29, 2002
Filing Date:
December 27, 1993
Export Citation:
Assignee:
KLA INSTRUMENTS CORPORATION
International Classes:
G03F7/20; H01L21/027; G01B11/00; (IPC1-7): H01L21/027; G01B11/00
Domestic Patent References:
JP62149129A | ||||
JP63100302A | ||||
JP5249699A | ||||
JP1230233A |
Other References:
【文献】米国特許5112129(US,A)
Attorney, Agent or Firm:
Takehiko Suzue
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