Title:
METHOD OF EVALUATING SURFACE OF INP SEMICONDUCTOR AND INTERFACE
Document Type and Number:
Japanese Patent JP3218374
Kind Code:
B2
Abstract:
PURPOSE: To provide a method of evaluating the surface condition of an InP semiconductor such as finished condition, preprocessed condition, etc., and the interface property between the InP semiconductor and an epitaxial layer simply.
CONSTITUTION: An InGaAs epitaxial layer, which does not substantially contain impurities and the lattice of which matches with that of InP, is grown on the surface of an InP semiconductor substantially being an insulator into the thickness not more than that of the depletion layer formed by the surface level of the epitaxial layer, and at least either the mobility of the carriers in that epitaxial layer, which includes the interface with the InP semiconductor, or the concentration of carriers per unit area is measured.
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Inventors:
Misao Takakusaki
Tsutomu Ozaki
Kazuhiro Akamatsu
Tsutomu Ozaki
Kazuhiro Akamatsu
Application Number:
JP11853292A
Publication Date:
October 15, 2001
Filing Date:
April 13, 1992
Export Citation:
Assignee:
Japan Energy Co., Ltd.
International Classes:
C30B29/40; H01L21/66; (IPC1-7): H01L21/66; C30B29/40
Domestic Patent References:
| JP1143264A | ||||
| JP5166908A | ||||
| JP6441272A | ||||
| JP482246A | ||||
| JP4102336A |
Attorney, Agent or Firm:
Hiroshi Arafune (1 person outside)