Title:
MEMORY ADDRESS CONVERTING DEVICE FOR DATA PROCESSING SYSTEM, AND DATA PROCESSING METHOD
Document Type and Number:
Japanese Patent JP2000040029
Kind Code:
A
Abstract:
To provide a data processing system and a data processing method capable of shortening the operation time needed for address conversion.
An address conversion circuit 6 converts the virtual address VA o a processor core 4 into a mapped address MA based on estimated address mapping and accesses a memory system 8. After that, when estimated address conversion is decided as invalid, the access is discarded and an access to the memory is carried out again with a mapped address which is corrected and is of correct conversion. In such a case, the state of the core 4 is held by prolonging a processor clock signal or making the processor clock signal continue and also making the core 4 standby.
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Inventors:
BULL DAVID MICHEAL
MIDDLETON PETER GUY
MIDDLETON PETER GUY
Application Number:
JP8203299A
Publication Date:
February 08, 2000
Filing Date:
March 25, 1999
Export Citation:
Assignee:
ADVANCED RISC MACH LTD
International Classes:
G06F12/02; G06F12/10; G06F12/1045; (IPC1-7): G06F12/10; G06F12/02
Attorney, Agent or Firm:
Akira Asamura (3 outside)
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