Title:
MEMORY CIRCUIT AND IMAGE PICKUP DEVICE
Document Type and Number:
Japanese Patent JPH06253202
Kind Code:
A
Abstract:
PURPOSE: To reduce the memory capacity of a memory circuit used for the image pickup device or the like.
CONSTITUTION: A signal compression circuit 1004 applies band split to two field signals S1, S2 forming a frame signal and obtains synthesis signals S3, S4 from the band split signals. The memory capacity of field memory circuits 1005, 1006 is reduced by making the frequency band of at least one of the synthesis signals S3, S4 narrower than that of the field signal S1 or S2. Then band split is applied to memory output signals of the field memory circuits 1005, 1006 to obtain the synthesis signal S5 nearly equal to the field signal S1 and the synthesis signal S6 nearly equal to the field signal S2.
Inventors:
SAKAGUCHI TAKASHI
KUSAKA HIROYA
NAKAYAMA MASAAKI
KUSAKA HIROYA
NAKAYAMA MASAAKI
Application Number:
JP3305693A
Publication Date:
September 09, 1994
Filing Date:
February 23, 1993
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04N5/232; H04N5/907; H04N9/04; (IPC1-7): H04N5/232; H04N5/907; H04N9/04
Attorney, Agent or Firm:
Akira Kobiji (2 outside)
Previous Patent: The emulsifier for milk ingredient content drinks
Next Patent: SOLID-STATE IMAGE PICKUP ELEMENT INSPECTING INSTRUMENT
Next Patent: SOLID-STATE IMAGE PICKUP ELEMENT INSPECTING INSTRUMENT