PURPOSE: To make it possible to perform the data processing efficiently, by causing a latch circuit, etc., to perform the read access to a memory to prefetch memory contents.

CONSTITUTION: In the data processing unit equipped with a microprocessor which has no memory prefetch function, memory access control unit 3 is connected to CPU1 through common bus 2, and memories 5-1, 5-2... are accessed by this unit 3. Here, unit 3 utilizes the idle time, when CPU1 performs the memory access to perform the read access to memories 5-1, 5-2... dependently upon address latch circuit 7, address comparing circuit 8, read data latch circuit 10, etc., which are provided in unit 3, thus prefetching memory contents. By this operation, needless frefetch generated for branch instructions is stopped, and the response of unit 3 is made rapid to release occupation of bus 2, thereby performing the data processing efficiently.