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Patent Searching and Data


Title:
MEMORY CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS54157444
Kind Code:
A
Abstract:

PURPOSE: To decrease the load of the software when the continuous rading/writing is carried out as well as to increase the velocity of the control process by providing the service control unit to secure a connection between the memory capable of reading N-words at one time and the processor performing the input/output by one word.

CONSTITUTION: The memory which is capable of simultaneous reading and writing for N-words is connected to writing line 3, address line 4 and data line 5 each; and service control circuit 35 performs the input and output with every word. In addition, microorder register 18, selector 11 connected to line 4 plus exclusive reading and writing buffer registers 12 and 13 are provided respectively. Signal 16A designates whether the access for only one word or the continuous access is given from register 18. And if the access is for one word, the wake-up is applied to the memory. While in the case of the continuous access, whether the address is at the boundary of transferred N-words with one cycle of the memory is decided. Based on this result, whether the wake-up is applied to the memory or the transfer is carried out between register 12 and 13 is decided.


Inventors:
BANDOU TADAAKI
FUKUNAGA YASUSHI
Application Number:
JP6575078A
Publication Date:
December 12, 1979
Filing Date:
June 02, 1978
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F12/08; G06F12/04; G06F13/00; (IPC1-7): G06F13/00; G11C9/00