Title:
MEMORY CONTROLLER, DIGITAL CAMERA AND IMAGE PROCESSING UNIT
Document Type and Number:
Japanese Patent JP3398141
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a digital camera that can realize area- and cost saving while maintaining a smooth moving picture recording operation.
SOLUTION: A frame buffer 7 is provided with recording areas A-D, and each of the recording areas A-D stores data by one image pattern (one frame). In usual moving picture processing, digital original image data of one frame each are sequentially stored in the area in the order of A→B→C→D and the data are sequentially outputted to a data bus 12 in a way of first-in first-out. When the data are stored into the final recording area D, the recording area A is again used. When an ON signal is fed from a still picture recording button 15a for a snap shot for that time, an area storing data captured in timing corresponding to the ON signal is used for a recording area 7a to save still picture data.
Inventors:
Shigeyuki Okada
Noriaki Kojima
Noriaki Kojima
Application Number:
JP2001066074A
Publication Date:
April 21, 2003
Filing Date:
March 09, 2001
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
G03B19/02; H04N5/225; H04N5/907; H04N5/91; H04N5/92; H04N101/00; (IPC1-7): H04N5/91; H04N5/907; H04N5/92
Domestic Patent References:
JP10276402A | ||||
JP1175148A |
Attorney, Agent or Firm:
Masamasa Shibano
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