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Patent Searching and Data


Title:
MEMORY I/F CONTROLLER
Document Type and Number:
Japanese Patent JPH10228415
Kind Code:
A
Abstract:

To set a standby number of a CPU to meet an access time of each memory and to use the memory by setting a standby number at the time of access in each extension memory area and changing standby numbers in a read/write cycle in accordance with a set standby number.

Read/write of internal memory that is preliminarily included in a system is checked. If a RAM module is mounted on an extension RAM slot, the level of a sense signal for access time identification is examined. A printer controlling part 1000 starts graphic display processing when the start of a system and various setting of an I/O, etc., are over and the part 1000 receives print data from a host computer 3000. A CPU 13 changes a standby number whenever necessary and stores data on extension memory 21. That is, when the memory 21 is mounted, the CPU 13 discriminates the access time and size of each memory and selects a memory area to be stored in whenever necessary.


Inventors:
ITO YORIYASU
Application Number:
JP4715797A
Publication Date:
August 25, 1998
Filing Date:
February 14, 1997
Export Citation:
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Assignee:
CANON KK
International Classes:
G06F12/06; G06F13/42; (IPC1-7): G06F12/06; G06F13/42
Attorney, Agent or Firm:
Masuaki Tanaka (1 outside)