PURPOSE: To relieve the load of hardware by providing a fault location classifying information generating circuit and a faulty location classification register holding faulty location classification information formed by the said circuit and displaying the content.
CONSTITUTION: When an error is detected by a memory controller 3, it is registered in a faulty location holding register in a faulty location display circuit 13 and the information is transmitted to a maintenance diagnostic device 5. A faulty location classification information generating circuit 14 takes logical operation for the content of a faulty location storage register at each classification unit, classifies it and outputs the result to a faulty location classification register 15. The content of the faulty location classification register is displayed directly on each device or displayed via a maintenance diagnostic device 5.
JPS57762A | 1982-01-05 | |||
JPS5933559A | 1984-02-23 | |||
JPS5420625A | 1979-02-16 |