To provide a versatile and easily used memory device equipped with a serial interface and advantageous in cost, space and power consumption as compared with a parallel interface.

This device is provided with a memory module 30 constituted of a nonvolatile memory to input/output signals in parallel, a transmission/reception circuit 11 for inputting/outputting signals in series, and control circuits 12 and 17 disposed between the memory module 30 and the transmission/reception circuit 11 to execute serial/parallel conversion processing and parallel/serial conversion processing in the same chip 10. The control circuit 17 is constituted of a CMOS logical circuit, the nonvolatile memory is manufactured by a process highly compatible to the manufacturing process of the CMOS logical circuit, a parameter for deciding the protocol of the control circuits 12 and 17 is changeable, and the parameter is stored in a nonvolatile memory 18.

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