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Title:
MEMORY DIMMER
Document Type and Number:
Japanese Patent JPH04324284
Kind Code:
A
Abstract:

PURPOSE: To decrease a time error when dimming control of a plurality of scenes is repeatedly performed.

CONSTITUTION: Data A1,..., An of illumination levels for representing brightness of an illuminating lamp 11 are stored in a scene data memory 12. Fading times T11,..., Tn1 and holding times T12,..., Tn2 are set in a time data memory 13. A total sum of the fading and duration times is preset to a time control circuit 18. A control circuit 14 reads a memory content of the scene data memory 12 and the time data memory 13 given to an arithmetic circuit 15 to control the illuminating lamp 11 dimmed. The time control circuit 18 counts down a clock signal from a clock circuit 16 to give an interruption signal to a CPU 41 when a count value becomes 0. In the CPU 41, dimming control from the first scene is repeated in response to the interruption signal.


Inventors:
MURAKAMI TOSHIO
Application Number:
JP9245291A
Publication Date:
November 13, 1992
Filing Date:
April 23, 1991
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
F21S10/00; H05B37/02; (IPC1-7): F21P5/00; H05B37/02
Attorney, Agent or Firm:
Nishikyo Keiichiro



 
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