Title:
MEMORY ENABLING NIBBLING AND WORD ADDRESSING FOR ACCESSING DATA APPARATUS CONTINUED FOR DECIMAL COMPUTATION
Document Type and Number:
Japanese Patent JPS60151761
Kind Code:
A
Abstract:
A data processing system having a central processing unit (CPU) capable of performing binary and decimal arithmetic software instructions is described. The CPU includes a microprocessor which executes the binary arithmetic software instructions under firmware control. The CPU also includes commercial instruction logic which is used in conjunction with the microprocessor to execute decimal arithmetic operations. The commercial instruction logic also operates under firmware control with the addressing of the firmware microinstructions being controlled by the microprocessor. Also disclosed is the method by which the CPU performs decimal addition, subtraction, multiplication and division arithmetic operations and the method used to convert a number in binary format to a number in a decimal format and the method used to convert a number in a decimal format to a number in binary format.
Inventors:
MERINDA EI WAIDEN
JIYON JIEI BURATSUDOREI
JIYOOJI EMU OHAA
JIYON JIEI BURATSUDOREI
JIYOOJI EMU OHAA
Application Number:
JP20611284A
Publication Date:
August 09, 1985
Filing Date:
October 01, 1984
Export Citation:
Assignee:
HONEYWELL INF SYSTEMS
International Classes:
G06F7/38; G06F7/483; G06F7/493; G06F12/04; G06F9/30; G06F9/302; G06F9/38; (IPC1-7): G06F12/02; G06F12/08
Domestic Patent References:
| JPS5592944A | 1980-07-14 |
Attorney, Agent or Firm:
Kyozo Yuasa