PURPOSE: To enable to decrease the number of external connection pins greatly by sending memory control information out without providing external connection pins characteristic to an information output for memory control.
CONSTITUTION: Arithmetic controller 101, made into one chip of a very large scale integrated semiconductor, is controlled by external control memory part 102 stored with a microprogram. At main bus 103, output data, memory data, etc., of memory part 102 arrive in time-division mode. Then when controller 101 is supplied with a microinstruction, one of external signal groups is inputted to controller 101 via bus 103 together with the microinstruction and during the transfer of memory addresses, memory control information is sent onto bus 103 together with memory addresses. Therefore, the number of external connection pins can be decreased greatly by sending memory control information out without providing external pins characteristic to information outputs for memory control.
SATOU FUMITAKA
YAMAZAKI ISAMU
| JPS53132231A | 1978-11-17 | |||
| JPS52122438A | 1977-10-14 |