Title:
Memory storage, the memory method, and a control device
Document Type and Number:
Japanese Patent JP6221762
Kind Code:
B2
Abstract:
A memory device includes a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a planar direction and a plurality of redundant blocks respectively arranged in a planar direction are stacked, a detecting unit configured to detect a defect of each of the memory blocks in the storage unit; a checking unit configured to check free capacity in each of the redundant blocks in the storage unit, and a determining unit configured to determine a substitute block to be substituted for the memory block in which the defect has been detected from the redundant blocks having the free capacity.
Inventors:
Miyazaki Sadao
Osamu Ishibashi
Abe Hitoshi
Osamu Ishibashi
Abe Hitoshi
Application Number:
JP2014006262A
Publication Date:
November 01, 2017
Filing Date:
January 16, 2014
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F12/16
Domestic Patent References:
| JP2011018371A | ||||
| JP2010015654A | ||||
| JP2006073181A | ||||
| JP2009170082A |
Foreign References:
| US20110007588 | ||||
| US20140347943 | ||||
| US7120777 |
Attorney, Agent or Firm:
Akira Hirakawa
Daisuke Takada
Daisuke Takada