Title:
MEMORY SYSTEM AND CONTROL METHOD
Document Type and Number:
Japanese Patent JP2023136083
Kind Code:
A
Abstract:
To provide a memory system capable of identifying data lost.SOLUTION: A controller of a memory system writes, in response to receiving from a host a write command specifying a logical address, data received from the host to a first write destination block. The controller manages a first list and first storage location information, the first list including a plurality of logical addresses corresponding respectively to write-uncompleted data that has been received from the host and not completely written to the first write destination block, and the first storage location information indicating a starting storage position of a write-uncompleted area where the data has not been written completely, in the first write destination block. When a power loss occurs without notice from the host, the controller writes the first list and the first storage location information to the nonvolatile memory using power from a capacitor.SELECTED DRAWING: Figure 7
Inventors:
SUGANO SHINICHI
SASAKI YUKI
SASAKI YUKI
Application Number:
JP2022041509A
Publication Date:
September 29, 2023
Filing Date:
March 16, 2022
Export Citation:
Assignee:
KIOXIA CORP
International Classes:
G06F12/00; G06F11/14; G06F12/02
Attorney, Agent or Firm:
Suzue International Patent Office