Title:
MEMORY SYSTEM
Document Type and Number:
Japanese Patent JP2015069602
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a memory system capable of high speed data processing.SOLUTION: A memory system of an embodiment includes a first semiconductor chip, a second semiconductor chip, and a memory controller. The first semiconductor chip and second semiconductor chip are connected with the memory controller through a plurality of I/O lines which include a first I/O line and a second I/O line, in a common manner. The first semiconductor chip outputs status information of the first semiconductor chip from the first I/O line to the memory controller, and at the same time, the second semiconductor chip outputs status information of the second semiconductor chip from the second I/O line to the memory controller.
Inventors:
GOTO HIROYUKI
TAKEDA SHINYA
TOHATA AKISHI
TAKEDA SHINYA
TOHATA AKISHI
Application Number:
JP2013205886A
Publication Date:
April 13, 2015
Filing Date:
September 30, 2013
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
G06F13/16
Domestic Patent References:
| JP2010507148A | 2010-03-04 | |||
| JP2013118030A | 2013-06-13 |
Foreign References:
| US20080089138A1 | 2008-04-17 | |||
| US20130238931A1 | 2013-09-12 |
Attorney, Agent or Firm:
Fujiwara Yasutaka
Shinji Nogi
Takuya Takahashi
Kumiko Kuroda
Kuniyuki Onishi
Takashi Ishikawa
Shinji Nogi
Takuya Takahashi
Kumiko Kuroda
Kuniyuki Onishi
Takashi Ishikawa
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