Title:
MEMORY SYSTEM
Document Type and Number:
Japanese Patent JP2020149222
Kind Code:
A
Abstract:
To realize a memory system capable of enhancing security when a host memory buffer (HMB) is used.SOLUTION: According to the embodiment, a memory system is connectable to a host with a first volatile memory and includes a non-volatile memory and a controller. The controller is capable of using a first area of the first volatile memory as a memory for temporary storing data that is stored in the non-volatile memory, and controls the non-volatile memory. The controller is configured to generate a first parity using first data and a key value stored in the non-volatile memory to store the first data and the generated first parity in the first area. The controller is configured to read the first data and the first parity when reading the first data stored in the first area to verify the read first data using the read first parity and the key value.SELECTED DRAWING: Figure 1
Inventors:
HARA KEIGO
Application Number:
JP2019044960A
Publication Date:
September 17, 2020
Filing Date:
March 12, 2019
Export Citation:
Assignee:
KIOXIA CORP
International Classes:
G06F12/14; G06F11/10; G06F12/0866; G06F12/0868
Attorney, Agent or Firm:
Suzue International Patent Office