Title:
MEMORY SYSTEM
Document Type and Number:
Japanese Patent JP2022118489
Kind Code:
A
Abstract:
To provide a memory system capable of simplifying information acquisition when debugging.SOLUTION: A memory system comprises a first memory, and a controller which is communicable with a host and controls the first memory. The controller includes: a first decoder for decoding a first command including first information indicating a logical position on the first memory; a second decoder for decoding a second command including second information indicating a physical position on the first memory; a first circuit for executing access to the first memory using the first information acquired from the first command by the first decoder; a second circuit for executing access to the first memory using the second information acquired from the second command by the second decoder; a first register whose stored value can be altered by the host; and a switch circuit for switching the circuit between the first circuit and the second circuit to access the first memory, in accordance with the value stored in the first register.SELECTED DRAWING: Figure 1
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Inventors:
INOUE RYO
ODA MINORU
ODA MINORU
Application Number:
JP2021015057A
Publication Date:
August 15, 2022
Filing Date:
February 02, 2021
Export Citation:
Assignee:
KIOXIA CORP
International Classes:
G06F11/07; G06F12/02; G06F13/14; G06F13/38; G06F13/42
Attorney, Agent or Firm:
Suzue International Patent Office