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Title:
MEMORY TEST DEVICE
Document Type and Number:
Japanese Patent JPH04278480
Kind Code:
A
Abstract:

PURPOSE: To improve the versatility of a circuit board, by taking a measure capable of changing an external location value used to make access through an external bus, a buffer for mediating the data transfer between an internal bus and the external bus.

CONSTITUTION: A gate 13 for a microprocessor 1 to read an external location value set by an external jumper 8 through an internal bus 2 in response to a request from a diagnostic program in a ROM 5 is provided. By providing this gate 13, the diagnostic program can obtain the external location value set by the external jumper 8, by instructing the microprocessor 1 when a buffer 4 needs to be accessed through an external bus 3 during the diagnosis of the buffer 4.


Inventors:
KATO SHU
TATEIRI KAZUAKI
Application Number:
JP3999891A
Publication Date:
October 05, 1992
Filing Date:
March 06, 1991
Export Citation:
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Assignee:
MATSUSHITA GRAPHIC COMMUNIC
International Classes:
G06F12/16; G11C29/00; G11C29/56; G01R31/28; (IPC1-7): G01R31/28; G01R31/318; G06F12/16; G11C29/00
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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