PURPOSE: To obtain a memory whose power consumption is reduced.

CONSTITUTION: A boosting power supply circuit 71 built in a synchronous DRAM chip produces a boosting power supply voltage Vpp from a system clock CLK. The boosting power supply voltage Vpp is fed to each circuit (53, 54, 56, 58, 59, 62) when the synchronous DRAM is inactivated and fed to each circuit (60, 67, 68) when the DRAM is activated. In other words, when the synchronous DRAM is inactivated, the boosting power supply 71 is utilized as a data retaining current supply for refresh operation. When the synchronous DRAM is activated, the boosting power supply 71 is utilized as a power supply for the circuit (60, 67, 68) requiring a large swing width.