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Patent Searching and Data


Title:
MEMORY
Document Type and Number:
Japanese Patent JPS5687289
Kind Code:
A
Abstract:

PURPOSE: To reduce the effect of double selection due to the address skew in a high- speed operation, by flowing a sufficiently large amount of current to the lower word line although the voltage of the upper word line does not reach the selection voltage.

CONSTITUTION: The diode Q0 in which the power source VCL is connected to the cathode is connected to the base of the transistor Q203, and the value is selected at a small amount for the resistance R204. The switch circuit 21a flows the maximum allowance current before the voltage of the word line LXO reaches the selection voltage. Accordingly, the falling speed can be increased for the word line voltage selected transiently toward the nonselection voltage although the voltage of word line LXO selected transiently is comparatively low since a large amount of current is flowed with a delay from the switch circuit 22a.


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Inventors:
HONMA NORIYUKI
YAMAGUCHI KUNIHIKO
Application Number:
JP16404379A
Publication Date:
July 15, 1981
Filing Date:
December 19, 1979
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G11C11/41; G11C7/02; G11C8/08; G11C8/18; G11C11/414; (IPC1-7): G11C11/34