To obtain a method for analyzing defect and a method for verifying chip sorting data in which reliability of the results of analysis based on chip sorting data can be enhanced.
At step S11, chip sorting data where a plurality of chips are sorted into four groups based on the presence of a (new) defect and the acceptability of (an integrated circuit) is acquired. At step S12, such a situation as chips are extracted randomly by the number of defective chips from all chips is set based on the chip sorting data acquired at step S11. Subsequently, at step S13, a random rejection probability P(N4), i.e., a probability where the number of rejectable chips in the randomly extracted chips is not smaller than a defective/rejectable number of chips N4, is determined.
HATTORI NOBUMI
JPH11264797A | 1999-09-28 |