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Title:
METHOD FOR ANALYZING SEMICONDUCTIVE INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS61286771
Kind Code:
A
Abstract:

PURPOSE: To perform setting so that an entire image having non-linear characteristics corresponds to gain calculation and to make it possible to rapidly and accurately perform the planning of a high-degree electronic circuit, by standardizing the change component of the value of the current flowing to each collector of the input transistor of a differential amplifying circuit to set a modulation degree.

CONSTITUTION: The bias current in the side of the common emitter of the input transis tor of a differential circuit is set to 2Io. The change component ΔI(=Ic-Io) of the complemented current obtained in the collector side of an input transistor when input was applied between the basis terminals of said transistor is standardized by dividing the same by the current Io having no change component appearing in each collector side when a zero signal was applied between the base terminals to set a modulation degree α(-1≤α≤1). The input voltage Vin of the differential circuit is expressed as a form of logarithmic function (Vin=alnα+b) by using the modulation degree αand, when the quantitative data of the differential circuit is desired to be obtained at the time of the planning of a circuit, the data is calculated by the calculation of the numerical value based on a relational equation and the relational equation is drawn on an x, y plane to draw non-linear characteristics.


Inventors:
SATO HARUNORI
Application Number:
JP12883985A
Publication Date:
December 17, 1986
Filing Date:
June 13, 1985
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G01R31/316; G06F17/50; H03F3/45; G01R31/28; (IPC1-7): G01R31/28; H03F3/45
Attorney, Agent or Firm:
Kenichi Hayase