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Title:
METHOD AND APPARATUS FOR POLISHING SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPH1015789
Kind Code:
A
Abstract:

To provide a method and apparatus for polishing a semiconductor wafer which can gain sufficient efficiency without producing any flaws on the surface of the semiconductor wafer.

A wafer supporting board supporting a semiconductor wafer 12 is inserted into an opening part 42A of a polishing liquid vessel 42 to immerse the semiconductor wafer 12 in polishing liquid 44. Next, a combined piston and wafer supporting board 14 is forced further into a combined cylinder and opening part 42A to increase the static pressure of the polishing liquid 44. The wafer supporting board 14 is rotated to move the semiconductor wafer 12 relatively to the polishing liquid and polish the surface 12A of the semiconductor wafer 12. According to this method, only the polishing liquid contacts the surface 12A, so that any flaws are produced on the surface 12A. Further, the viscosity of the polishing liquid 44 is raised by increasing the static pressure of the polishing liquid 44 to improve the holding property of grsins, so that the sufficient polishing efficiency can be obtained.


Inventors:
SAKAI KENJI
Application Number:
JP16960796A
Publication Date:
January 20, 1998
Filing Date:
June 28, 1996
Export Citation:
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Assignee:
TOKYO SEIMITSU CO LTD
International Classes:
B24B1/00; B24B37/00; H01L21/304; (IPC1-7): B24B1/00; H01L21/304
Attorney, Agent or Firm:
Kenzo Matsuura