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Title:
METHOD AND CIRCUIT ARRANGEMENT FOR RESYNCHRONIZING MEMORY MANAGEMENT ARRANGEMENT
Document Type and Number:
Japanese Patent JPH09167078
Kind Code:
A
Abstract:

To provide a resynchronizing method for a serial memory, specially, a first-in first-out memory which can obtain high error permissibility without requesting the time order of input data while maintaining the storage capacity of a complete memory.

This method protects the contents of the contents of a current write pointer or marks data written at the point of time of an input synchronizing signal IS for every input synchronizing signal. A next synchronizing block is read out to the FIFO memory by using an output synchronizing signal OS right after all the data of one synchronizing block are read out, and the readout pointer is loaded with a write pointer which is protected before. Consequently, the write and readout pointers are newly adjusted by synchronizing blocks.


Inventors:
RARUFU OOSUTAAMAN
Application Number:
JP20833896A
Publication Date:
June 24, 1997
Filing Date:
August 07, 1996
Export Citation:
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Assignee:
THOMSON BRANDT GMBH
International Classes:
G11C7/00; G06F5/10; G06F5/12; G06F11/00; G06F11/14; (IPC1-7): G06F5/06; G11C7/00
Attorney, Agent or Firm:
Tadahiko Ito (1 outside)