To reduce the energy consumption by setting one input terminal of an active element to a potential independent of an input signal during the time of first and second stages.

An integration capacitor Co is fixedly connected with the drain of an active element Mts which receives a constant current bias. An input terminal 122 of a sampling transistor Mss is fixedly connected with an input signal Us and sampling of input signals between two clock steps is performed. The input signal is sampled on the first clock step, inputted through a switch S1 to a capacitor Ci1 and next, the input signal is sampled during the second clock step and inputted through a switch S2 to a capacitor Ci2. During this term, one input terminal of the active element Mts and one input terminal of the integration capacitor Co are held at the potential independent of the input signal.