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Patent Searching and Data


Title:
METHOD AND CIRCUIT FOR PROTECTING DATA MULTIPLICITY
Document Type and Number:
Japanese Patent JPH06268633
Kind Code:
A
Abstract:

PURPOSE: To unnecessitate a large capacity RAM for storing data showing the number of all the objective steps by storing the numbers of continuous errors and non-errors up to the preceding step and adding '1' to the stored value in the case of the next error or non-error input.

CONSTITUTION: As augend values, input data Din and the continuously generated errors/non-errors from a storage means 20 up to the preceding step are inputted to an adding means 10. Corresponding to whether the new input is the error or the non-error, the means adds '1' to the continuous number in both of cases. These continuous numbers are stored in the storage means 20 and at the same time, the added value up to the preceding step on the same time base as these input data is read from the means 20 and inputted to the means 10. Concerning the output of the means 10, set values (n) and (m) at the time of the error and non-error are compared by a comparing means 30. In the case of error continuous number ≥n, an error signal is outputted from a set/reset means 40 and in the case of non-error continuous number 2 m, an error cancel signal is outputted. The number of errors/non-errors is the number of times of continuous generation and when the continuity is cut even once in the middle, the value of the means 10 is turned to '0'.


Inventors:
OKU TATSUYA
Application Number:
JP5341693A
Publication Date:
September 22, 1994
Filing Date:
March 15, 1993
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L1/00; (IPC1-7): H04L1/00
Attorney, Agent or Firm:
Toyoaki Fukui