PURPOSE: To provide a method and a device for automatic logic circuit design, which generate a circuit having a small number of logic elements and that of logic stages at the time of generating both a multiplier which performs multiplication with a multiplier or a multiplicand being a constant and a circuit including the multiplier, and the multiplier which performs multiplication with a multiplier or a multiplicand being a constant.
CONSTITUTION: It is retrieved whether the constant of a binary expressed number being the multiplicand continuously has digits whose values are '1' or not (S201); and if it continuously has them, the constant is converted to a redundant binary where the value of the digit one higher than the highest digit of them, the value of the lowest digit, and values of digits between them are '1', and '0' respectively (S202). Next, it is retrieved whether the constant has two adjacent two of digits whose values are '-1' and '0' or not ($204); and when it has them, they are converted to '0' and '-1' respectively (S205). When the number of digits whose values are not '0' of the multiplicand is reduced in this manner, a circuit to obtain partial products of only values which are not '0' is generated by a processing omitted in the figure.
NISHIYAMA TAMOTSU