Title:
METHOD AND DEVICE FOR BYTE ORDER SWITCHING IN COMPUTER
Document Type and Number:
Japanese Patent JPH06124201
Kind Code:
A
Abstract:
PURPOSE: To provide a method and a device which enable given computer to execute a program by using the architecture of either big Endian or little Endian.
CONSTITUTION: The method and device use the fact that exclusive OR processing between the low-order two bits of a byte address of one architecture and binary 3 converts the byte address into an equivalent byte address of the other architecture. In an ideal practical example, the conversion is realized not only by software, but also by hardware.
Inventors:
RARII BII UEEBAA
AARU EI KIRIAN
MAAKU AI HIMERUSUTAIN
AARU EI KIRIAN
MAAKU AI HIMERUSUTAIN
Application Number:
JP19784991A
Publication Date:
May 06, 1994
Filing Date:
August 07, 1991
Export Citation:
Assignee:
MITSUPUSU COMPUTER SYST INC
International Classes:
G06F9/06; G06F5/00; G06F7/76; G06F9/34; G06F9/44; G06F9/455; G06F12/04; (IPC1-7): G06F9/06
Attorney, Agent or Firm:
Kazuo Kobashi (1 person outside)
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