Title:
METHOD AND DEVICE FOR DATA PROCESSING
Document Type and Number:
Japanese Patent JP2601960
Kind Code:
B2
Abstract:
PURPOSE: To increase the speed when a process and algorithm for parallel operation are handled by packing an operand in a word which has clear buffer bits between operands.
CONSTITUTION: Three operands 210, 220, and 230 packed in a single 32-bit word 200 include many bits for data 212, 222, and 232 and also include single plus signs (+) bits 214, 224, and 234. Further, buffer bits 240 and 250 are included between the operands and those buffer bits 240 and 250 are set to '0' prior to mathematical operation and logical operation that are performed for the packed word 200. Thus, the operands 210... are processed in parallel, so the operands 210... are packed in the word having at least one cleared buffer bits 240 and 250 and the word is processed.
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Inventors:
Allen Peter Jiensen
Michael Turrell Banover
Michael Turrell Banover
Application Number:
JP25705891A
Publication Date:
April 23, 1997
Filing Date:
September 09, 1991
Export Citation:
Assignee:
International Business Machines Corporation
International Classes:
G06F7/38; G06F5/00; G06F7/48; G06F7/50; G06F7/505; G06F7/509; G06T11/00; H03M7/44; (IPC1-7): G06F7/50; G06T11/00
Domestic Patent References:
| JP61224037A |
Attorney, Agent or Firm:
Kiyoshi Goda (2 outside)