Title:
METHOD AND DEVICE FOR DIGITIZING CCD DATA
Document Type and Number:
Japanese Patent JPH09153803
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To set a delay time with high precision and low tolerance by delaying the analog output signal of a data generation means by an analog delay circuit instead of delaying a clock signal. SOLUTION: A low-pass filter 20(LPF) is inserted between the output of a circuit 12 and ADC 14. LPF 20 functions as the analog delay circuit delaying the output signal of a conditioning circuit 12 to a fixed delay time T'. In addition, a register and two inductance elements are serially connected between the output of the conditioning circuit 12 and ADC 14. Then ADC 14 reads and converts a delayed signal Vccd with a timing t0 when a signal CONV is lowered from high to low level, by being controlled by a converter clock signal CONV(= PHIn). At the moments of them, reading voltage is provided with a value Vout showing the quantity of light received by a corresponding CCD cell 10.
Inventors:
KIYASARINUSU BUAN ATSUKOI
Application Number:
JP20534696A
Publication Date:
June 10, 1997
Filing Date:
July 16, 1996
Export Citation:
Assignee:
OCE NEDERLAND BV
International Classes:
H03M1/12; G06F3/05; H03H17/00; H03M1/66; H04N5/14; H04N5/335; (IPC1-7): H03M1/12; H03H17/00; H03M1/66
Attorney, Agent or Firm:
Yuzo Yamazaki (1 person outside)