PURPOSE: To improve the superposing accuracy in a chip and, at the same time, to improve the manufacturing yield of an LSI, etc., by exposing patterns by changing the chip size of an exposing chip at every layer.
CONSTITUTION: Patterns are exposed changing the chip size of an exposing chip at every layer. In addition, a projection exposing device provided with a projection lens reduction factor correcting mechanism contains reduction factor correcting values in its exposing program at every layer of the exposing chip. While it is arranged so that, for example, the reduction factor correcting values can be inputted at the exposing program of each layer, the elongation/ reduction of a wafer is used as the projecting pattern reduction factor correcting value by regarding the elongation/reduction as the elongation/reduction of the chip or all chips on the wafer are exposed with the same reduction factor correcting value by using the statistical mean value of the chip sizes of a plurality of chips. Or, masks having different chip pattern sizes are used by changing the masks at every layer instead of the exposing device or the reduction factor of the pattern sizes is corrected by elongating/contracting the masks by changing the temperature of the masks.
TOMINAGA MANABU
JPH0388317A | 1991-04-12 | |||
JPS6313331A | 1988-01-20 | |||
JPS63104420A | 1988-05-09 |