Title:
METHOD AND DEVICE FOR GENERATING PSEUDO-RANDOM BINARY SEQUENCE PATTERN
Document Type and Number:
Japanese Patent JP3173373
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a pseudo-random binary sequence pattern generation method on a device easy to realize easily its circuit by halving the speed of a clock required for the circuit operation.
SOLUTION: A timing conversion circuit 1 applies serial conversion to an 8-bit timing signal 1a in the unit of 2 bits and provides an output to a loop register 2 and a pattern alignment circuit 3. The loop register 2 generates a pseudo-random binary sequence pattern by one or two bits each based on a received 2-bit signal and provides an output to the pattern alignment circuit 3. Furthermore, the pattern alignment circuit 3 rearranges a pattern outputted from the loop register 2 based on the 2-bit signal outputted from the timing conversion circuit 1 and provides an output.
Inventors:
Kenji Ohtoshi
Application Number:
JP13230296A
Publication Date:
June 04, 2001
Filing Date:
May 27, 1996
Export Citation:
Assignee:
Ando Electric Co., Ltd.
International Classes:
G06F7/58; H03K3/84; H04J3/00; G01R31/3183; (IPC1-7): H03K3/84; G01R31/3183; H04J3/00
Domestic Patent References:
| JP7154215A |
Attorney, Agent or Firm:
Masatake Shiga (2 outside)
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