METHOD AND DEVICE FOR POLISHING SEMICONDUCTOR WAFER - Mitsubishi Sumitomo Silicon Co., Ltd.

Title:

METHOD AND DEVICE FOR POLISHING SEMICONDUCTOR WAFER

Document Type and Number:

Japanese Patent JP3663705

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To provide high flatness and parallelism by a method wherein when the two surfaces of a semiconductor wafer are polished by upper and lower surface plates, a relative speed and load distribution are uniformalized throughout the whole areas of the two surfaces.
SOLUTION: A polishing device comprises a carrier 5 to hold a semiconductor wafer 6 in a horizontal state; upper and lower surface plates 2 and 3 brought into slide contact with the upper and under surfaces of the semiconductor wafer 6 and nipping the upper and under surfaces from above and below; a lap member 4 placed on the upper surface plate 2 so that the upper surface plate 2 is rendered relatively horizontally movable; and gear driving mechanisms 9, 10, 21, and 22 to reciprocate the upper and lower surface plates 2 and 3 at a uniformalized relative speed in a direction reverse to each other throughout the whole areas of the upper and the under surfaces of the semiconductor wafer 6. In such a way that the upper and lower surface plates 2 and 3 are linearly moved in a reverse direction to each other, the upper and the under surfaces of the semiconductor wafer 6 are polished at uniform speed distribution and bearing distribution throughout the whole areas of the upper and under surfaces thereof, and machining precision, such as flatness, is excellent.

Inventors:

Hideo Minami

Application Number:

JP33707695A

Publication Date:

June 22, 2005

Filing Date:

December 25, 1995

Export Citation:

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