To provide a digital resampling circuit which generates a bit stream including samples of a desired rate from an input bit stream having a fixed sample rate.

The resampling circuit 100 has a desired sample rate by digitally interpolating samples included in an input signal. The interpolation is carried out by using an all-pass infinite impulse response filter and a digital signal process is used to generate a bit stream having a 2nd sample rate lower than the 1st sample rate with the input bit stream having the 1st sample rate. The resampling circuit 100 generates ≥1 bit streams having different sample rates from the input bit stream having the fixed sample rate without using VCXO or an analog control loop.