Title:
METHOD AND DEVICE FOR REFLECTING RECEPTION OF RESET PULSE BY MICROPROCESSOR HAVING ACCESS TO EITHER ONE OF PLURAL SUBPROGRAMS
Document Type and Number:
Japanese Patent JPH04211817
Kind Code:
A
Abstract:
PURPOSE: To identify a switched-on reset pulse and a reset pulse having a different generation source.
CONSTITUTION: Processing is performed through a stage for changing a logical data item accessable by a microprocessor from a 1st state to a 2nd state only after the lapse of a certain time interval from switch-on, a stage for reading that logical data item before the lapse of that time interval each time the reset pulse is received, and a stage for performing branch to an initial setting subprogram suitable for switch-on or a subprogram suitable for that required processing corresponding to whether the logical data item is set in the 1st state or the 2nd state.
Inventors:
JIRE SHIYURAARU
ARAN SAGU
ARAN SAGU
Application Number:
JP1254491A
Publication Date:
August 03, 1992
Filing Date:
January 11, 1991
Export Citation:
Assignee:
NEIMAN SA
International Classes:
G06F1/24; G06F9/06; G06F9/48; (IPC1-7): G06F1/24; G06F9/06; G06F9/46
Attorney, Agent or Firm:
Shoichi Takezawa (1 person outside)