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Patent Searching and Data


Title:
METHOD OF DISCONNECTING WIRING OF SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH04165650
Kind Code:
A
Abstract:

PURPOSE: To reduce the wiring interval of a semiconductor integrated circuit even when the circuit is multilayered by providing dummy wiring to each layer of the circuit except the uppermost layer and successively disconnecting the dummy wire with a laser beam from the upper layer.

CONSTITUTION: Dummy fuse wiring 5 is disconnected with a laser beams before fuse wiring 2 is disconnected. When the wiring 5 is disconnected, an upper insulating film layer 3 is destroyed and scattered. The fuse wiring 2 is then disconnected, but, since the insulating film layer on the wiring 2 is made thinner at the time of disconnecting the wiring 5, the destruction of the layer 3 caused by the disconnection, etc., of the wiring 2 takes place at and around the part immediately above the wiring 2. While the scale of the final destruction is large, accordingly, the scale becomes smaller as compared with the case where the fuse wiring 2 is disconnected at once. Therefore, the scale of the insulating film destruction at the time of disconnecting fuse wiring can be reduced and the interval of aluminum wiring constituting a semiconductor integrated circuit can be reduced.


Inventors:
KAWAI MAKOTO
Application Number:
JP29276390A
Publication Date:
June 11, 1992
Filing Date:
October 29, 1990
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H05K3/46; H01L21/3205; H01L21/82; H01L23/52; (IPC1-7): H01L21/3205; H01L21/82; H05K3/46
Attorney, Agent or Firm:
Masuo Oiwa (2 outside)