Title:
METHOD FOR ETCHING DEEP GROOVE IN SILICON SUBSTRATE
Document Type and Number:
Japanese Patent JPH05217991
Kind Code:
A
Abstract:
PURPOSE: To provide a method of etching deep trenches in a silicon substrate, including deep lateral trenches having the so-called mesa structures for breaking bonds beneath the surfaces of semiconductor components, without leaving irregular oxide caps. CONSTITUTION: This method of etching deep trenches in an Si substrate 20 uses an oxide mask 24, having written outlines according to a desired shape of the trench. A resist serving to form the mask is removed. A new resist layer 26 is formed and etched, to define a resist mask which overlaps the edge of the oxide mask. A wafer is dipped in a chemicals tank for etching Si to form desired trenches 28, partly extending below the oxide mask. After cleaning, the wafer is dipped in a chemicals tank to etch Si and remove oxide caps on the trenches and part of an oxide layer extruding over the edges of the trenches on the substrate.
Inventors:
JIERARUDO DEYUKURIYUU
Application Number:
JP29901192A
Publication Date:
August 27, 1993
Filing Date:
November 10, 1992
Export Citation:
Assignee:
SGS THOMSON MICROELECTRONICS
International Classes:
H01L21/3065; H01L21/306; H01L21/308; (IPC1-7): H01L21/306
Attorney, Agent or Firm:
Hisami Fukami (4 outside)