METHOD FOR FLATTENING INSULATION FILM

Title:

METHOD FOR FLATTENING INSULATION FILM

Document Type and Number:

Japanese Patent JPH098007

Kind Code:

A

Abstract:

PURPOSE: To provide a method for flattening an insulation film on an entire wafer face more uniformly than a conventional method which uses an etch-back method.

CONSTITUTION: An interlayer insulation film 24 is formed on an Al interconnection layer 22 on a substrate 20. Then a first layer resist film is formed in a recessed region 28 of the interlayer insulation film between the Al interconnection layers so that a surface of the first layer resist film comes to an approximately equal position to a surface of an interlayer insulation film of a protruding region 30. A pattern of the first layer resist film having such a shape that fills the recessed region of the interlayer insulation film between the Al interconnection layers is formed. A second layer resist film is formed flat on the entire substrate. The resist film is etched back until the interlayer insulation film of the protruding region is exposed. The interlayer insulation film of the protruding region and the resist film in the recessed region are simultaneously etched back. After removing the resist film remaining in the recessed region, the interlayer insulation film is formed on the entire substrate.

Inventors:

KOSHIO KENJI
MORIKAWA TAKASHI
BANSHO OSAMI

Application Number:

JP17416595A

Publication Date:

January 10, 1997

Filing Date:

June 16, 1995

Export Citation:

Click for automatic bibliography generation Help

Assignee:

SONY CORP

International Classes:

H01L21/302; H01L21/3065; H01L21/3205; (IPC1-7): H01L21/3065; H01L21/3205

Next Patent: METHOD FOR FORMING INTERCONNECTION AND INTERCONNECTION STRUCTURE