Title:
METHOD OF FORMING EMBOSSED STRUCTURE ON DOUBLE PAINT LAYER
Document Type and Number:
Japanese Patent JPS5752135
Kind Code:
A
Abstract:
Relief structures comprised of double lacquer layers on substrates already having relief structures for integrated semiconductor circuits are produced by applying a lower lacquer layer onto such substrate and which is composed of a material which does not cross-link or decompose due to radiation energy and which has only relatively slight sensitivity at the radiation energy dosage range utilized for structuring; applying an upper lacquer layer onto the lower lacquer layer and which upper layer is thinner relative to the thickness of the lower layer by a factor of at least 2 and is composed of a highly sensitive negative lacquer material; generating desired relief structures in the upper lacquer layer and removing those portions of the lower lacquer which are not covered by the upper negative lacquer layer.
Inventors:
HARUTOUITSUHI BIIRUHENKE
JIIKUFURIITO BIRUKURE
ROORANTO RUUBUNAA
JIIKUFURIITO BIRUKURE
ROORANTO RUUBUNAA
Application Number:
JP11501981A
Publication Date:
March 27, 1982
Filing Date:
July 22, 1981
Export Citation:
Assignee:
SIEMENS AG
International Classes:
H01L21/027; G03F7/09; G03F7/095; H01L21/312; (IPC1-7): H01L21/30