Title:
METHOD OF FORMING FINE RESIST PATTERN AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3441439
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method of forming fine resist pattern by which a resist pattern which is finer than an upper-layer resist pattern formed through wet development can be formed easily in the manufacturing process of a semiconductor, etc.
SOLUTION: After a two-layer resist (lower-layer resist 12 and upper-layer resist 13) containing a silylated resist in its upper layer is formed by coating, the upper-layer resist pattern 15 is formed through exposure and wet development, and an un-reacted active resist is only left in the interior section 17 of the resist pattern 15 by exposing the whole surface of the pattern 15. Thereafter, an Si element is only imparted to the interior section 17 of the pattern 15 by silylating the whole surface of the pattern 15, and the fine resist pattern 19 is formed by developing the lower-layer resist 12 by using Si element-containing areas 18 as masks.
More Like This:
| JPS5721819 | FORMING METHOD FOR PATTERN |
| JPWO2003007084 | Manufacturing method of printed wiring board |
Inventors:
Isao Sato
Application Number:
JP2001059130A
Publication Date:
September 02, 2003
Filing Date:
March 02, 2001
Export Citation:
Assignee:
Semiconductor Leading Edge Technologies, Inc.
International Classes:
G03F7/26; G03F7/40; H01L21/027; H01L21/302; H01L21/3065; (IPC1-7): H01L21/027; G03F7/26; G03F7/40; H01L21/3065
Domestic Patent References:
| JP2000112149A | ||||
| JP9180986A |
Attorney, Agent or Firm:
Mamoru Takada (2 outside)
Previous Patent: CONSTRUCTION METHOD USING FORM-CUM-HEAT INSULATING PANEL
Next Patent: DEVICE FOR OPENING AND CLOSING MANUAL UPLIFT SLUICE GATE
Next Patent: DEVICE FOR OPENING AND CLOSING MANUAL UPLIFT SLUICE GATE