To provide a method for forming an integrated circuit structure in which capacitance is reduced in the horizontal direction between metal lines separately arranged proximately to each other while avoiding occurrence of via poisoning.
In an integrated circuit structure 2 on a semiconductor substrate, a dielectric material having a low dielectric constant (k) is laid in layers between metal lines 10a-10d separately arranged proximately to each other in the horizontal direction so that capacitance is reduced in the horizontal direction between the metal lines. At the same time, vias are made through a second layer of dielectric material having a standard dielectric constant to reach the metal line so that silicon nitride caps 20a-20d exist on the metal line thus avoiding via poisoning.
AHMED SHAFQAT
BANERJEE ROBINDRANATH
