Title:
METHOD OF FORMING SILICIDE FILM FOR SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JP3873008
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method of forming a uniform silicide film of small resistance for a semiconductor element.
SOLUTION: This method of forming a silicide film for a semiconductor element is constituted of steps in which gate electrode, which is made of a polysilicon layer, being formed on the upper part of a semiconductor substrate, and a spacer being formed on the sidewall; source/drain regions are formed on both sides of the gate electrode by implanting impurities there in the substrate; a Ti layer, which is a part in thickness of a Ti layer to be evaporated over the whole surface of the structure, is evaporated, and internal defects are formed in the Ti layer by treating it with plasma of Ar or N2 gas; and after the Ti layer of the residual thickness and TiN are evaporated thereon, heat treatment process is applied, to form a Ti silicide film on the upper parts of the gate electrode and the source/drain regions.
Inventors:
Chung
Jun Kim
Jun Kim
Application Number:
JP2002187601A
Publication Date:
January 24, 2007
Filing Date:
June 27, 2002
Export Citation:
Assignee:
Tobu Electronics Co., Ltd.
International Classes:
H01L21/28; H01L21/24; H01L21/265; H01L21/285; H01L21/336; H01L29/78; (IPC1-7): H01L21/28; H01L21/336; H01L29/78
Domestic Patent References:
| JP7273066A | ||||
| JP6029292A | ||||
| JP5114580A | ||||
| JP10055984A | ||||
| JP7201777A | ||||
| JP2003501801A | ||||
| JP6112158A | ||||
| JP8316173A | ||||
| JP9153616A | ||||
| JP10116797A | ||||
| JP10223559A |
Attorney, Agent or Firm:
Shuichiro Kitamura
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