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Patent Searching and Data


Title:
METHOD FOR IMPROVING CONSISTENCY OF CACHE
Document Type and Number:
Japanese Patent JPH0210449
Kind Code:
A
Abstract:

PURPOSE: To fetch the block of data through the use of a processor controlling access to a cache storage device by transmitting the block of information consisting of n-pieces of words on information to a system bus in accordance with the request of a first word in information.

CONSTITUTION: Processor units 11-13 are mutually connected by the system bus 10, the processor units 11-13 have interfaces 14, bus monitor units 15, cache storage devices 18, the processors 23 and floating point processors 30. When the first word of information is requested among the processor units 11-13, the block of information consisting of n-pieces of words in information is loaded on the system bus in accordance with the request, and n-pieces of words in the block of information are received.


Inventors:
JIYON RUBINSHIYUTEIN
GUREN ESU MIRANKAA
RICHIYAADO ROOUENTAARU
Application Number:
JP4976389A
Publication Date:
January 16, 1990
Filing Date:
March 01, 1989
Export Citation:
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Assignee:
ARDENT COMPUTER CORP
International Classes:
G06F12/08; G06F12/0831; G06F12/0846; G06F12/0855; (IPC1-7): G06F12/08
Attorney, Agent or Firm:
Masaki Yamakawa (3 outside)