Title:
METHOD FOR LAMINATING WAFER AND CIRCUIT PATTERN TAPE
Document Type and Number:
Japanese Patent JP3158252
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To stick an adhesive layer formation circuit pattern tape at precise position and direction by outputting the reference position of each one point of the adhesive layer formation circuit pattern and a wafer as a visual image, and moving the wafer in an X-direction/a Y-direction/specified angle for matched reference positions.
SOLUTION: An adhesive layer formation circuit pattern tape 50 is chucked (chucking tool 142) with a circuit pattern sucking/transportation assembly 141, while a wafer 2 is chucked and fixed on a die with a wafer chucking/fixing assembly 151. Using a visual detection assemble 161, the reference position between adhesive layer formation circuit pattern tape 50 and the wafer 2 is detected, and the detecting result is compared/outputted by a monitor assembly 171, to determine whether or not the reference position is in agreement. If they agree, the chucking tool 142 is transferred downward to make it laminated, and if they disagree, the die is changed to X and/or Y directions, and/or angle θto correct the reference position to conduct lamination.
Inventors:
Youn Pillar
Ken Yuu
Lee Chang Fu
Makoto Cheng
Ken Yuu
Lee Chang Fu
Makoto Cheng
Application Number:
JP24509099A
Publication Date:
April 23, 2001
Filing Date:
August 31, 1999
Export Citation:
Assignee:
Amcor Technology Korea Inc.
International Classes:
H01L23/12; H01L23/28; H01L23/498; H01L23/544; (IPC1-7): H01L23/12
Domestic Patent References:
| JP10112468A | ||||
| JP10178124A | ||||
| JP7231008A |
Attorney, Agent or Firm:
Toru Seya