Title:
METHOD FOR MACHINING SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JP3328309
Kind Code:
B2
Abstract:
PURPOSE: To form a shallow and uniform buried layer in a first semiconductor wafer by forming a metal silicide layer on a first semiconductor wafer, bonding the metal silicide layer to a second semiconductor wafer and diffusing impurities.
CONSTITUTION: A silicide layer 104 and an oxide layer 106 are bonded to a semiconductor substrate grasping part 102 over the entire region 108. A semiconductor layer 100 is formed on the silicide layer 104. After the semiconductor layer 100 is made thin, it is lightly doped together with the silicide layer 104 to form isolation regions 116, 118, 120, i.e., lightly doped silicon islands. Subsequently, an N-type region 126 and a P-type region 128 are formed in the isolation region followed by formation of buried layer regions 134, 136. The buried layers 134, 136 can be made shallow by controlling ascending diffusion. Consequently, a shallow buried layer can be formed uniformly and entirely.
More Like This:
Inventors:
Scott Sea Blackstone
Application Number:
JP1840392A
Publication Date:
September 24, 2002
Filing Date:
January 08, 1992
Export Citation:
Assignee:
Unitroad Corporation
International Classes:
H01L21/02; H01L21/20; H01L21/225; H01L21/3215; H01L21/331; H01L21/74; H01L21/762; H01L21/8228; H01L27/00; H01L27/082; H01L27/12; H01L29/732; (IPC1-7): H01L27/12; H01L21/331; H01L21/762; H01L21/8228; H01L27/082; H01L29/732
Domestic Patent References:
JP1259546A | ||||
JP2262359A | ||||
JP2219252A |
Attorney, Agent or Firm:
Teruo Akimoto